The present disclosure relates, in general, to electronics, and more particularly, to circuits and processes for demodulating a Pulse Width Modulated (PWM) signal. Demodulating a PWM signal produces an output signal having a value indicating a duty cycle of the PWM signal. For example, a voltage value of the output signal may have a value proportional to the duty cycle of the PWM signal.
Technologies for demodulating PWM signals may suffer from insufficient resolution, insufficient bandwidth or slow response times, significant output ripple, complex implementation requiring skilled engineering, a need for trimming in production, or high bill-of-material costs. Some technologies may require an additional clock signal, which may need to have a frequency that is several times the frequency of the PWM signal being demodulated.
It would be advantageous to have circuits and processes for demodulation a PWM signal that provided good resolution, fast settling time, low or no voltage ripple in the output, ease of implementation, ease of use, and a low bill-of-materials cost.
Those skilled in the field of the present disclosure will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of the embodiments.
The apparatus and process components have been represented where appropriate by conventional symbols in the drawings, showing only those specific details that are pertinent to understanding the embodiments. This avoids obscuring the disclosure with details that will be readily apparent to those of ordinary skill in the art having the benefit of the disclosures herein. The details of well-known elements, structures, or processes that are necessary to practice the embodiments and that are well known to those of skill in the art may not be shown and should be assumed present unless otherwise indicated.